The present disclosure relates to non-volatile storage.
Semiconductor memory has become increasingly popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrically Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories. With flash memory, also a type of EEPROM, the contents of the whole memory array, or of a portion of the memory, can be erased in one step, in contrast to the traditional, full-featured EEPROM.
Both the traditional EEPROM and the flash memory utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The floating gate is positioned between the source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage (VTH) of the transistor thus formed is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.
Typically, a program voltage VPGM applied to the control gate during a program operation is applied as a series of pulses that increase in magnitude over time. In one possible approach, the magnitude of the pulses is increased with each successive pulse by a predetermined step size, e.g., 0.2-0.4 V. VPGM can be applied to the control gates of flash memory elements. In the periods between the program pulses, verify operations are carried out. That is, the programming level of each element of a group of elements being programmed in parallel is read between successive programming pulses to determine whether it is equal to or greater than a verify level to which the element is being programmed.
For some architectures, thousands of memory cells can be programmed or read at the same time. For example, with a NAND architecture the control gates of thousands of memory cells may be connected together into what is commonly referred to as a word line. Thus, by applying a program voltage to the word line, thousands of memory cells can be programmed at a time. Likewise, by applying a read voltage to the word line, thousands of memory cells can be read at a time.
A memory array may have many word lines, each used as a control line for a different set of memory cells. For some architectures, programming or reading is performed on one word line at a time. Typically, this is referred to as the selected word line. Thus, a programming voltage may be applied to the selected word line, at that same time another voltage that does not program memory cells is applied to unselected word lines. For reading, a read compare voltage may be applied to the selected word line, at the same time that a read pass voltage is applied to the unselected word lines.
One technique for applying the necessary voltages to the word lines is through a word line switch transistor that is connected to each word line. For some techniques, in order to turn on the word line switch transistor to transfer the program voltage to the word line, the gate of the word line switch transistor needs to be at least the program voltage plus the transistor's threshold voltage. Program voltages may be quite large, thus the needed gate voltage is even larger. These large voltages are typically provided by charge pumps in a peripheral region of the memory device. However, generating larger voltages may require a larger charge pump, which takes up more chip real estate and increases complexity.